Last week Intel announced it has started shipments of its Stratix 10 DX FPGA to early adopters. The DC models are designed for next-generation cache-coherent accelerators for custom servers. Unique to the Stratix family, the Stratix 10 DX field-programmable arrays support Intel’s Ultra Path Interconnect (Intel UPI) for direct coherent connection with Intel’s future Xeon Scalable processors. This is also in line with support for PCIe Gen 4, HBM2 memory, Intel Optane memory, and 100 GbE.
Intel’s Stratix 10 DX FPGAs feature four Arm Cortex-A53 cores as well as up to 2,753,000 logic elements, 933,7120 adaptive logic modules, and 3,732,480 ALM registers. The FPGA can connect to upcoming Intel’s Xeon Scalable processors using a UPI interface at a peak speed of 28 GB/s and with a rated 37% lower latency. Intel states that for its partners that want aggressive communications, UPI connectivity will act as a launch pad for future FPGA connectivity options, such as PCIe 5.0 and CXL.
Depending on the application that a Stratix 10 DX is used for, the FPGA can use up to 4 TB of Intel Optane DC persistent memory DIMMs (using up to eight DIMMs), or up to 8 GB of HBM2 memory, or a mix. Each Stratix 10 DX family member can support a number of transciever and memory tiles which can be mixed and matched - ultimately these FPGA users design their own PCBs, making it possible, rather than just off-the-shelf cards. In addition, the chip has a 100 GbE interface and can be used for SmartNICs.
One of the first customers to get Intel’s Stratix DX FPGA is VMware, which will use it to build on-premises and cloud solutions for its clients. That said, it is reasonable to think that VMware already has Intel’s next-generation Xeon Scalable processors and will be ready with solutions featuring these CPUs and the new FPGAs when the products launch commercially.
The Stratix 10 DX family represents the final element of the 'Altera' family of FPGAs since the acquisition by Intel. After Stratix comes Agilex, built on Intel's 10nm, which is already shipping to select customers. Agilex was purporse built for Intel's 10nm process, and thus the integration of Altera into Intel now seems complete.
Related Reading
- Intel’s Enterprise Extravaganza 2019: Launching Cascade Lake, Optane DCPMM, Agilex FPGAs, 100G Ethernet, and Xeon D-1600
- Intel Shows Xeon Scalable Gold 6138P with Integrated FPGA, Shipping to Vendors
- Intel Launches Stratix 10 TX: Leveraging EMIB with 58G Transceivers
Source: Intel
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