Western Digital has added two new processor cores — the SweRV Core EH2 and the SweRV Core EL2 — into its SweRV portfolio of microcontroller CPUs. And, keeping in line with past parts, and the company has made their register-transfer level (RTL) design abstraction available to the industry for free. In addition, the company has also introduced the first hardware reference design for OmniXtend cache coherent memory over Ethernet protocol, and transferred management and support of the architecture to Chips Alliance.
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